VLSI Architecture of a High-Performance Neural Spiking Activity Simulator Based on Generalized Volterra Kernel

被引:0
|
作者
Li, Will X. Y. [1 ]
Xin, Yao [1 ]
Song, Dong [2 ]
Berger, Theodore W. [2 ]
Cheung, Ray C. C. [1 ]
机构
[1] City Univ Hong Kong, Dept Elect Engn, Hong Kong, Hong Kong, Peoples R China
[2] Univ So Calif, Ctr Neural Engn, Dept Biomed Engn, Los Angeles, CA 90089 USA
关键词
neural spiking activity; neural simulator; field-programmable gate array; neural prosthesis; MODEL;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
It is well known that information is represented and transmitted among neuronal units by a series of all-or-none "neural codes". In neuroinformatics study, this coding process, also termed as "spiking activity", is not straightforward for prediction. It is owing to the high nonlinearity and dynamic property involved in generation of the neuronal spikes. In this paper, a novel generalized Volterra kernel-based neural spiking activity simulator is introduced for prediction of the neural codes in mammalian hippocampal region. High-performance VLSI architecture is established for the simulator based on high-order Volterra kernels involving cross terms. The effectiveness and efficiency of the simulator are proven in experimental settings. This simulator has the potential to serve as a core functional unit in future hippocampal cognitive neural prosthesis.
引用
收藏
页码:272 / 275
页数:4
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