Dislocation Reduction in CdTe Epilayers Grown on Silicon Substrates Using Buffered Nanostructures

High-performance HgCdTe IR detector fabrication on silicon substrates first requires low-defect density CdTe buffer layers to be grown on silicon. The objective of this paper is to demonstrate dislocation reduction in CdTe epitaxial layers grown on silicon substrate by using intermediate nanocrystalline CdTe buffer layers. Colloidal synthesis of high-quality CdTe nanocrystals was accomplished, and spin coating of these CdTe nanocrystals as buffer layers on silicon substrates was carried out. CdTe layers were grown on these buffered substrates by metalorganic chemical vapor deposition (MOCVD). However, the incomplete removal of SiO2 on silicon substrate (by chemical treatment) prevented the exact orientation of the nanocrystals with the silicon substrate and over layer growth of continuous single-crystal CdTe epitaxial film. Two new approaches were further investigated. First, a thin film of Ge was grown on Si, followed by the deposition of thin SiO2, followed by nanopatterning using block co-polymer (BCP) lithography. Transmission electron microscopy (TEM) showed defect reduction in the CdTe layers grown on these substrates, but the x-ray rocking curves over a larger area gave wider full-width half-maximum (FWHM) values compared to that of layers grown on blanket surfaces. This was attributed to non-uniform nanopatterning in these initial studies. Second, SiO2-coated silicon substrates were nanopatterned using interference lithography with a honeycomb array of holes. These substrates will be used for the selective growth of germanium and CdTe by MOCVD.