Effect of barrier layer on the electrical and reliability characteristics of high-k gate dielectric films

被引:23
|
作者
Jeon, YJ [1 ]
Lee, BH [1 ]
Zawadzki, K [1 ]
Qi, WJ [1 ]
Lucas, A [1 ]
Nieh, R [1 ]
Lee, JC [1 ]
机构
[1] Univ Texas, Ctr Microelect Res, Austin, TX 78712 USA
关键词
D O I
10.1109/IEDM.1998.746476
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Electrical and reliability characteristics of several metal/high-k/(barrier layer)/Si capacitor structures have been investigated. The equivalent oxide thickness (EOT) increased as the annealing temperature increased, especially in oxygen ambient. Jet vapor-deposited (JVD) nitride was found to be a good oxidation barrier which is important for achieving thin EOT. Introducing TiO2 as a barrier layer reduced the leakage current and EOT of Pt/PST/Si capacitor. The conduction mechanism in Pt/TiO2/Si structure was found to be tunneling-like behavior limited by the interfacial layer. Hysteresis could be minimized by the optimization of the annealing process. In reliability characteristics, TiO2 revealed no significant degradation and exhibited better wear-out properties than conventional SiO2.
引用
收藏
页码:797 / 800
页数:4
相关论文
共 50 条
  • [41] Reliability Characteristics of La-doped High-k/Metal Gate nMOSFETs
    Kang, C. Y.
    Choi, R.
    Lee, B. H.
    Jammy, R.
    JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2009, 9 (03) : 166 - 173
  • [42] Atomic layer deposition of High-k in thin films for gate and capacitor dielectrics
    Senzaki, Y
    Chatham, H
    Park, S
    Bartholomew, L
    Lo, T
    Okuyama, Y
    Barelli, C
    Tousseau, C
    Fleming, T
    Ford, B
    2004 INTERNATIONAL CONFERENCE ON INTEGRATED CIRCUIT DESIGN AND TECHNOLOGY, 2004, : 269 - 274
  • [43] Simulation of electrical characteristics and structural optimization for small-scaled dual-gate GeOI MOSFET with high-k gate dielectric
    白玉蓉
    徐静平
    刘璐
    范敏敏
    Journal of Semiconductors, 2014, 35 (09) : 43 - 48
  • [44] Recent Findings In Electrical Behavior Of CMOS High-k Dielectric/Metal Gate Stacks
    Ghibaudo, G.
    Coignus, J.
    Charbonnier, M.
    Mitard, J.
    Leroux, C.
    Garros, X.
    Clerc, R.
    Reimbold, G.
    SILICON NITRIDE, SILICON DIOXIDE, AND EMERGING DIELECTRICS 11, 2011, 35 (04): : 773 - 804
  • [45] Reliability characteristics of high-k, dielectrics
    Kim, YH
    Lee, JC
    MICROELECTRONICS RELIABILITY, 2004, 44 (02) : 183 - 193
  • [46] Process techniques and electrical characterization for high-k (HfOxNy) gate dielectric in MOS devices
    Chang-Liao, KS
    Lu, CY
    Cheng, CL
    Wang, TK
    2004: 7TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUITS TECHNOLOGY, VOLS 1- 3, PROCEEDINGS, 2004, : 372 - 377
  • [47] Simulation of electrical characteristics and structural optimization for small-scaled dual-gate GeOI MOSFET with high-k gate dielectric
    Bai Yurong
    Xu Jingping
    Liu Lu
    Fan Minmin
    JOURNAL OF SEMICONDUCTORS, 2014, 35 (09)
  • [48] Thermal stability and electrical properties of titanium-aluminum oxide ultrathin films as high-k gate dielectric materials
    Shi, L.
    Xia, Y. D.
    Xu, B.
    Yin, J.
    Liu, Z. G.
    JOURNAL OF APPLIED PHYSICS, 2007, 101 (03)
  • [49] Optimization of ALD High-k Gate Dielectric to Improve AlGaN/GaN MOS-HFET DC Characteristics and Reliability
    Azam, Faisal
    Lee, Bongmook
    Misra, Veena
    2017 IEEE 5TH WORKSHOP ON WIDE BANDGAP POWER DEVICES AND APPLICATIONS (WIPDA), 2017, : 39 - 43
  • [50] Electrical Properties and Interfacial Structures of High-k/Metal Gate MOSCAP using Ti/TiN Scavenging Stack between High-k Dielectric and Metal Gate
    Ma, Xueli
    Wang, Xiaolei
    Han, Kai
    Wang, Wenwu
    Yang, Hong
    Zhao, Chao
    Chen, Dapeng
    Ye, Tianchun
    CHINA SEMICONDUCTOR TECHNOLOGY INTERNATIONAL CONFERENCE 2013 (CSTIC 2013), 2013, 52 (01): : 117 - 121