Robot fault-tolerance using an embryonic array

被引:0
|
作者
Jackson, AH [1 ]
Canham, R [1 ]
Tyrrell, AM [1 ]
机构
[1] Univ York, Dept Elect, Bioinspired Engn Lab, Intelligent Syst Grp, York YO10 5DD, N Yorkshire, England
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Fault-tolerance, complex structure management and reconfiguration are seen as valuable characteristics. Embryonic arrays represent one novel approach that takes inspiration from nature to improve upon standard techniques. An existing BAE SYSTEMS RASCAL(TM) robot has been augmented so as to improve the motor control system reliability through two biologically-inspired systems: An embryonic array and an artificial immune system. This paper is concerned with the embryonic array; this is novel in that it supports datapath-wide arithmetic and logic functions. The array is configured to provide an autonomous self-repairing hardware motor controller and is realised using a standard Xilinx Virtex FPGA. As with previous embryonic systems, the logic requirement of the array is greater than that of a conventional FPGA or standard modular-redundancy approach. However, the array offers the advantages of both conventional FPGAs and modular-redundancy techniques; it is a reconfigurable computing platform that provides inherent fault-tolerance through its distributed self-repair mechanism.
引用
收藏
页码:91 / 100
页数:10
相关论文
共 50 条
  • [41] LAN DISTRIBUTED FAULT-TOLERANCE
    MIROJULIA, J
    [J]. DECENTRALIZED AND DISTRIBUTED SYSTEMS, 1993, 39 : 161 - 174
  • [42] Automated Fault-Tolerance Testing
    Nagarajan, Adithya
    Vaddadi, Ajay
    [J]. 2016 IEEE NINTH INTERNATIONAL CONFERENCE ON SOFTWARE TESTING, VERIFICATION AND VALIDATION WORKSHOPS (ICSTW), 2016, : 275 - 276
  • [43] FAULT-TOLERANCE IN SIMPLE PERCEPTRONS
    VISWANATHAN, R
    [J]. PHYSICS LETTERS A, 1994, 188 (01) : 55 - 58
  • [44] Automating the addition of fault-tolerance
    Kulkarni, SS
    Arora, A
    [J]. FORMAL TECHNIQUES IN REAL-TIME AND FAULT-TOLERANT SYSTEMS, PROCEEDINGS, 2000, 1926 : 82 - 93
  • [45] Fault-Tolerance in Field Programmable Gate Array with Dynamic Voltage and Frequency Scaling
    Leong, C.
    Semiao, J.
    Santos, M. B.
    Teixeira, I. C.
    Teixeira, J. P.
    [J]. JOURNAL OF LOW POWER ELECTRONICS, 2015, 11 (04) : 517 - 527
  • [46] Interconnection Network Reconstruction for Fault-Tolerance of Torus-Connected VLSI Array
    Zhu, Longting
    Wu, Jigang
    Jiang, Guiyuan
    Sun, Jizhou
    [J]. ALGORITHMS AND ARCHITECTURES FOR PARALLEL PROCESSING, ICA3PP 2014, PT I, 2014, 8630 : 285 - 298
  • [47] HP DISK ARRAY - MASS-STORAGE FAULT-TOLERANCE FOR PC SERVERS
    SKEIE, TA
    RUSNACK, MR
    [J]. HEWLETT-PACKARD JOURNAL, 1995, 46 (03): : 71 - 81
  • [48] Fault simulation to validate fault-tolerance in Ada
    Napier, J
    Chen, LP
    May, J
    Hughes, G
    [J]. COMPUTER SYSTEMS SCIENCE AND ENGINEERING, 2000, 15 (01): : 61 - 67
  • [49] Fault-Tolerance Characteristics of Data Center Network Topologies Using Fault Regions
    Liu, Yang
    Muppala, Jogesh
    [J]. 2013 43RD ANNUAL IEEE/IFIP INTERNATIONAL CONFERENCE ON DEPENDABLE SYSTEMS AND NETWORKS (DSN), 2013,
  • [50] Adding fault-tolerance using pre-synthesized components
    Kulkarni, SS
    Ebnenasir, A
    [J]. DEPENDABLE COMPUTING - EDCC-5, PROCEEDINGS, 2005, 3463 : 72 - 90