On the Breakdown Physics of Trench-Gate Drain Extended NMOS

被引：0

作者：

Tailor, Ketankumar H. ^{[1
]}

Shrivastava, Mayank ^{[2
]}

Gossner, Harald ^{[3
]}

Baghini, Maryam Shojaei ^{[1
]}

Rao, V. Ramgopal ^{[1
]}

机构：

[1] Indian Inst Technol, Dept Elect Engn, Bombay 400076, Maharashtra, India

[2] Indian Inst Sci, Dept Elect Syst Engn, Bangalore 560012, Karnataka, India

[3] Intel Mobile Commun GmbH, Munich, Germany

来源：

PROCEEDINGS OF THE 2015 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC) | 2015年

关键词：

Base-push effect; breakdown physics; drain extended NMOS (DeNMOS); input-output (I/O); mixed-signal performance; offset structure; ON-state resistance; radio frequency (RF) performance; space charge modulation; trench gate (TG);

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this work, two drain extended NMOS (DeNMOS) devices, one with only planar gate and another with both planar gate and gate in a trench under the gate-drain overlap region (called trench-gate DeNMOS) are investigated. The latter device shows improved ON-state performance due to greater space charge control with addition of trench gate. The OFF-state breakdown physics is also compared with conventional DeNMOS device. Due to greater field spreading in the trench-gate device under OFF-state conditions, a distinct base-push effect is not observed, unlike conventional device. The oxide reliability in trench-gate device improves with an additional offset in the drift region. Therefore, the trench-gate DeNMOS can be used as an alternative to improve input/output (I/O) device performance and reliability in advanced system-on-chip (SoC) applications.

引用

页码：804 / 807

页数：4

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