Towards an Efficient Implementation of Sequential Montgomery Multiplication

被引：0

作者：

Neto, Joao Carlos ^{[1
]}

Tenca, Alexandre Ferreira ^{[2
]}

Ruggiero, Wilson Vicente ^{[1
]}

机构：

[1] Univ Sao Paulo, Polytech Sch, Dept Comp & Digital Syst Engn, Sao Paulo, Brazil

[2] Synopsys Inc, Hillsboro, OR USA

来源：

2010 CONFERENCE RECORD OF THE FORTY FOURTH ASILOMAR CONFERENCE ON SIGNALS, SYSTEMS AND COMPUTERS (ASILOMAR) | 2010年

关键词：

Cryptography; high-speed arithmetic; modular exponentiation and multiplication; MODULAR MULTIPLICATION;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A method to generate efficient implementations of sequential Montgomery Multiplication (MM) is proposed. It is applied to radix-2 MM, but could be used for other radices. An efficient solution is obtained when inactive adders in a cycle are re-assigned to perform useful computation. The resulting hardware algorithm and architecture accelerate the modular multiplication by looking ahead the input data of two iterations and in some cases compressing two iterations in one, without increasing the iteration time too much. Experiments show 33.6% average reduction in clock cycles when proposed multiplier is applied to implement modular exponentiation in the 2048-bit RSA cryptosystem.

引用

页码：1680 / 1684

页数：5

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