Materials Challenges for sub-20nm lithography

被引:6
|
作者
Thackeray, James W. [1 ]
机构
[1] Dow Elect Mat, Marlborough, MA 01752 USA
关键词
chemical amplification; EUV; resists; diffusion; polymer-bound PAG; CHEMICALLY AMPLIFIED RESISTS; POLYMERS;
D O I
10.1117/12.882958
中图分类号
O43 [光学];
学科分类号
070207 ; 0803 ;
摘要
This paper discusses the future of resist materials for sub-20nm lithography. It is my contention that polymer-bound PAG based resists will be used to 16nm node. There has been enough progress in resolution and sensitivity to justify the use of these materials. PBP resists have shown that the principal demerit of acid diffusion can be overcome through attachment of the PAG anion to the lithographic polymer. Since the introduction of this chemically amplified resist approach, we have seen steady improvement in resolution, sensitivity, and LWR. We have also seen improvement in OOB response, outgassing, and pattern collapse. There is no doubt that continuous improvement is still required for these resist systems. We believe that increasing the overall resist quantum yield for acid generation substantially improves the shot noise problem thereby leading to faster high resolution resist materials. Using a 0.30NA EUV tool with dipole, we can achieve 22nm hp resolution, with 12mJ dose, and 4.2nm LWR.
引用
收藏
页数:16
相关论文
共 50 条
  • [41] Novel Hardmask For sub-20nm Copper/Low k Backend Dual Damascene Integration
    Xia, Li-Qun
    Cui, David
    Balseanu, Mihaela
    Victor Nguyen
    Zhou, Kevin
    Pender, Jeremiah
    Naik, Mehul
    SILICON NITRIDE, SILICON DIOXIDE, AND EMERGING DIELECTRICS 11, 2011, 35 (04): : 651 - 665
  • [42] Device Considerations of Planar NAND Flash Memory for Extending towards Sub-20nm Regime
    Park, Youngwoo
    Lee, Jaeduk
    2013 5TH IEEE INTERNATIONAL MEMORY WORKSHOP (IMW), 2013, : 1 - 4
  • [43] Extended scalability of perpendicular STT-MRAM towards sub-20nm MTJ node
    Kim, Woojin
    Jeong, J. H.
    Kim, Y.
    Lim, W. C.
    Kim, J. H.
    Park, J. H.
    Shin, H. J.
    Park, Y. S.
    Kim, K. S.
    Park, S. H.
    Lee, Y. J.
    Kim, K. W.
    Kwon, H. J.
    Park, H. L.
    Ahn, H. S.
    Oh, S. C.
    Lee, J. E.
    Park, S. O.
    Choi, S.
    Kang, H. K.
    Chung, C.
    2011 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM), 2011,
  • [44] The Impact and Optimization of EUV Sensitive Si Hardmask for Sub-20nm Patterning in EUVL with NTD Process
    Shigaki, Shuhei
    Onishi, Ryuji
    Yaguchi, Hiroaki
    Shibayama, Wataru
    Fujitani, Noriaki
    Sakamoto, Rikimaru
    JOURNAL OF PHOTOPOLYMER SCIENCE AND TECHNOLOGY, 2013, 26 (05) : 679 - 683
  • [45] Stitching-Aware In-Design DPT Auto Fixing for Sub-20nm Logic Devices
    Choi, Soo-Han
    Krishna, Sai K. V. V. S.
    Pemberton-Smith, David
    DESIGN-PROCESS-TECHNOLOGY CO-OPTIMIZATION FOR MANUFACTURABILITY XI, 2017, 10148
  • [46] Fabricating vertically aligned sub-20nm Si nanowire arrays by chemical etching and thermal oxidation
    Li, Luping
    Fang, Yin
    Xu, Cheng
    Zhao, Yang
    Zang, Nanzhi
    Jiang, Peng
    Ziegler, Kirk J.
    NANOTECHNOLOGY, 2016, 27 (16)
  • [47] Higher NMOS Single Event Transient Susceptibility Compared to PMOS in Sub-20nm Bulk FinFET
    Sun, Qian
    Guo, Yang
    Liang, Bin
    Tao, Ming
    Chi, Yaqing
    Huang, Pengcheng
    Wu, Zhenyu
    Luo, Deng
    Chen, Jianjun
    IEEE ELECTRON DEVICE LETTERS, 2023, 44 (10) : 1712 - 1715
  • [48] Electrical validation of the integration of 193i and DSA for sub-20nm metal cut patterning
    Liu, Chi-Chun
    Farrell, Richard
    Lai, Kafai
    Mignot, Yann
    Liu, Eric
    Guo, Jing
    Ido, Yasuyuki
    Muramatsu, Makoto
    Felix, Nelson
    Hetzer, David
    Ko, Akiteru
    Arnold, John
    Corliss, Daniel
    NOVEL PATTERNING TECHNOLOGIES FOR SEMICONDUCTORS, MEMS/NEMS, AND MOEMS 2019, 2019, 10958
  • [49] Efficiently Realizing Weak Cell Aware DRAM Error Tolerance for Sub-20nm Technology Nodes
    Wang, Hao
    Zhao, Kai
    Zhang, Tong
    2015 IEEE 7TH INTERNATIONAL MEMORY WORKSHOP (IMW), 2015, : 57 - 60
  • [50] Device parameter optimization for sub-20nm node HK/MG-last bulk FinFETs
    许淼
    殷华湘
    朱慧珑
    马小龙
    徐唯佳
    张永奎
    赵治国
    罗军
    杨红
    李春龙
    孟令款
    洪培真
    项金娟
    高建峰
    徐强
    熊文娟
    王大海
    李俊峰
    赵超
    陈大鹏
    杨士宁
    叶甜春
    Journal of Semiconductors, 2015, 36 (04) : 70 - 73