Tools and Techniques for Implementation of Real-time Video Processing Algorithms

被引：0

作者：

Levent, Vecdi Emre ^{[1
]}

Guzel, Aydin E. ^{[1
]}

Tosun, Mustafa ^{[2
]}

Buyukmihci, Mert ^{[1
,3
]}

Aydin, Furkan ^{[1
]}

Goren, Sezer ^{[3
]}

Erbas, Cengiz ^{[4
]}

Akgun, Toygar ^{[4
]}

Ugurdag, H. Fatih ^{[1
]}

机构：

[1] Ozyegin Univ, Istanbul, Turkey

[2] Ozyegin Univ, EEE, Istanbul, Turkey

[3] Yeditepe Univ, Elect & Elect Engn, Istanbul, Turkey

[4] Aselsan, Ankara, Turkey

来源：

JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY | 2019年 / 91卷 / 01期

关键词：

Hardware IP generation; Real-time video processing; High-level synthesis; FPGA; Optical flow; Nested pipelining;

D O I：

10.1007/s11265-018-1402-7

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper describes flexible tools and techniques that can be used to efficiently design/generate quite a variety of hardware IP blocks for highly parameterized real-time video processing algorithms. The tools and techniques discussed in the paper include host software, FPGA interface IP (PCIe, USB 3.0, DRAM), high-level synthesis, RTL generation tools, synthesis automation as well as architectural concepts (e.g., nested pipelining), an architectural estimation tool, and verification methodology. The paper also discusses a specific use case to deploy the mentioned tools and techniques for hardware design of an optical flow algorithm. The paper shows that in a fairly short amount of time, we were able to implement 11 versions of the optical flow algorithm running on 3 different FPGAs (from 2 different vendors), while we generated and synthesized several thousand designs for architectural trade-off.

引用

页码：93 / 113

页数：21

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