Negative bias temperature instability: Road to cross in deep submicron silicon semiconductor manufacturing

被引:754
|
作者
Schroder, DK [1 ]
Babcock, JA
机构
[1] Arizona State Univ, Dept Elect Engn, Tempe, AZ 85287 USA
[2] Arizona State Univ, Ctr Low Power Elect, Tempe, AZ 85287 USA
[3] PDF Solut Inc, Richardson, TX 75082 USA
关键词
D O I
10.1063/1.1567461
中图分类号
O59 [应用物理学];
学科分类号
摘要
We present an overview of negative bias temperature instability (NBTI) commonly observed in p-channel metal-oxide-semiconductor field-effect transistors when stressed with negative gate voltages at elevated temperatures. We discuss the results of such stress on device and circuit performance and review interface traps and oxide charges, their origin, present understanding, and changes due to NBTI. Next we discuss the effects of varying parameters (hydrogen, deuterium, nitrogen, nitride, water, fluorine, boron, gate material, holes, temperature, electric field, and gate length) on NBTI. We conclude with the present understanding of NBTI and its minimization. (C) 2003 American Institute of Physics.
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页码:1 / 18
页数:18
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