Novel FPGA-based signature match circuit for efficient network intrusion detection

被引：0
|
作者：
Ou, Chien-Min [1 ]
机构：
[1] Ching Yun Univ, Dept Elect Engn, Chungli 320, Taiwan
来源：
PROCEEDINGS OF THE 6TH WSEAS INTERNATIONAL CONFERENCE ON APPLIED COMPUTER SCIENCE | 2007年
关键词：
network intrusion detection system; FPGA implementation; pattern matching;
D O I：
暂无
中图分类号：
TP18 [人工智能理论];
学科分类号：
081104 ; 0812 ; 0835 ; 1405 ;
摘要：
This paper introduces a novel FPGA-based signature match co-processor that can serve as the core of a hardware-based network intrusion detection system (NIDS). The key feature of the signature match co-processor is an architecture based on the shift-or algorithm, which employs simple shift registers, or-gates, and ROMs where patterns are stored. As compared with related work, experimental results show that the proposed work achieves higher throughput and less hardware resource in the FPGA implementations of NIDS systems.
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页码：535 / +
页数：2
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