Verification Problems in Reusing Internal Design Components

被引：0
|
作者：
Stapleton, Warren [1 ]
Tobin, Paul [2 ]
机构：
[1] AMD, 7171 Southwest Pkwy, Austin, TX 78735 USA
[2] AMD, Boxboro, MA 01719 USA
来源：
DAC: 2009 46TH ACM/IEEE DESIGN AUTOMATION CONFERENCE, VOLS 1 AND 2 | 2009年
关键词：
Verification; SOC; IP; Validation;
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
Large SOCs provide new verification challenges. This paper discusses how the SOC/IP paradigm has impacted AMD, and highlights some of the design issues that you need to consider if you are going to embark on implementing the SOC/IP approach on large projects in your own company.
引用
收藏
页码：209 / +
页数：2
相关论文
共 50 条
  • [21] Reusing ontologies and language components for ontology generation
    Lonsdale, Deryle
    Embley, David W.
    Ding, Yihong
    Xu, Li
    Hepp, Martin
    DATA & KNOWLEDGE ENGINEERING, 2010, 69 (04) : 318 - 330
  • [22] Reusing mechanical engineering design
    Lacroix, Z
    PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL CONFERENCE ON INFORMATION REUSE AND INTEGRATION, 2003, : 299 - 304
  • [23] Design, verification, and validation of self-checking software components
    Geoghegan, SJ
    Avresky, D
    CONFERENCE PROCEEDINGS OF THE 1996 IEEE FIFTEENTH ANNUAL INTERNATIONAL PHOENIX CONFERENCE ON COMPUTERS AND COMMUNICATIONS, 1996, : 420 - 426
  • [24] Supporting Verification-Driven Incremental Distributed Design of Components
    Menghi, Claudio
    Spoletini, Paola
    Chechik, Marsha
    Ghezzi, Carlo
    FUNDAMENTAL APPROACHES TO SOFTWARE ENGINEERING (FASE 2018), 2018, 10802 : 169 - 188
  • [25] Problems with the design of internal gearing with extreme parameters
    Nemcek, Milos
    DETC2007: PROCEEDINGS OF THE ASME INTERNATIONAL DESIGN ENGINEERING TECHNICAL CONFERENCES AND COMPUTERS AND INFORMATION IN ENGINEERING CONFERENCE, VOL 7, 2008, : 199 - 206
  • [26] Design recovery of internal and external features for mechanical components
    Urbanic, R. J.
    Elmaraghy, W. H.
    VIRTUAL AND PHYSICAL PROTOTYPING, 2008, 3 (02) : 61 - 83
  • [27] A Modular Approach for Reusing Formalisms in Verification Tools of Concurrent Systems
    Andre, Etienne
    Barbot, Benoit
    Demoulins, Clement
    Hillah, Lom Messan
    Hulin-Hubard, Francis
    Kordon, Fabrice
    Linard, Alban
    Petrucci, Laure
    FORMAL METHODS AND SOFTWARE ENGINEERING, 2013, 8144 : 199 - 214
  • [28] An Approach for Reusing Test Source of an IP to Reduce Verification Effort
    Pawankumar, B.
    Bhargava, C. R.
    Kariyappa, B. S.
    Narayanan, S.
    Kamalakar, R.
    2012 1ST INTERNATIONAL CONFERENCE ON EMERGING TECHNOLOGY TRENDS IN ELECTRONICS, COMMUNICATION AND NETWORKING (ET2ECN), 2012,
  • [29] Improving the consistency checking process by reusing formal verification knowledge
    Redondo, RPD
    Arias, JJP
    Vilas, AF
    Duque, JG
    Solla, AG
    PERSPECTIVES OF SYSTEM INFORMATICS, 2003, 2890 : 366 - 380
  • [30] Reusing RTL Assertion Checkers for Verification of SystemC TLM Models
    Bombieri, Nicola
    Fummi, Franco
    Guarnieri, Valerio
    Pravadelli, Graziano
    Stefanni, Francesco
    Ghasempouri, Tara
    Lora, Michele
    Auditore, Giovanni
    Marcigaglia, Mirella Negro
    JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2015, 31 (02): : 167 - 180
12345