High Speed Static Frequency Divider Design with 111.6 GHz Self-Oscillation Frequency (SOF) in 0.13 μm SiGe BiCMOS Technology

被引:0
|
作者
Ali, U. [1 ]
Bober, M. [1 ]
Thiede, A. [1 ]
Awny, A. [2 ]
Fischer, G. [2 ]
机构
[1] Univ Paderborn, Warburger Str 100, D-33098 Paderborn, Germany
[2] IHP, D-15236 Frankfurt, Oder, Germany
关键词
HBT; latch; SiGe; static frequency dividers;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A speed optimization scheme for static frequency dividers based on master-slave flip-flops is presented. As a proof of the concept, the design of a divide by two static frequency divider in 0.13 mu m SiGe BiCMOS technology (with f(t) > 300 GHz and f(max) > 450 GHz) is reported. The circuit exhibits the highest self-oscillation frequency (SOF) of 111.6 GHz among the existing SiGe technology based static frequency dividers. With single-ended sine wave clock input, divider is operational from 6 to 128.7 GHz (limited by measurement equipment). At dual power supply with V-cc = 3 V and V-ee = -1.9 V, the circuit consumes 40 mA per latch.
引用
收藏
页码:241 / 243
页数:3
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