Adding microMIPS Backend to the LLVM Compiler Infrastructure

被引：0
|
作者：
Kolek, Jozef [1 ]
Jovanovic, Zoran [1 ]
Sljivic, Nenad [1 ]
Narancic, Dragan [1 ]
机构：
[1] RT RK, Comp Based Syst, Novi Sad 21000, Serbia
来源：
2013 21ST TELECOMMUNICATIONS FORUM (TELFOR) | 2013年
关键词：
Compilers; LLVM; microMIPS;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This work describes extending of the LLVM Compiler Infrastructure with the new backend support for microMIPS, which is an architecture from MIPS family of architectures. New backend consists of 16- and 32-bit instructions, out of which 180 of 32-bit instructions are recoded MIPS32 instructions, and 14 of 32-bit instructions are new microMIPS instructions. There are the 39 highly optimized 16-bit instructions.
引用
收藏
页码：1015 / 1018
页数：4
相关论文
共 50 条
  • [31] Energy-efficient backend compiler design for embedded systems
    Shiue, WT
    IEEE REGION 10 INTERNATIONAL CONFERENCE ON ELECTRICAL AND ELECTRONIC TECHNOLOGY, VOLS 1 AND 2, 2001, : 103 - 109
  • [32] Backend compiler phases for trapped-ion quantum computers
    Schmale, Tobias
    Temesi, Bence
    Baishya, Alakesh
    Pulido-Mateo, Nicolas
    Krinner, Ludwig
    Dubielzig, Timko
    Ospelkaus, Christian
    Weimer, Hendrik
    Borcherding, Daniel
    2022 IEEE INTERNATIONAL CONFERENCE ON QUANTUM SOFTWARE (IEEE QSW 2022), 2022, : 32 - 37
  • [33] The Design of LLVM-based Shader Compiler for Embedded Architecture
    Kuo, Li-Wei
    Yang, Chun-Chieh
    Lee, Jenq-Kuen
    Tseng, Shau-Yin
    2014 20TH IEEE INTERNATIONAL CONFERENCE ON PARALLEL AND DISTRIBUTED SYSTEMS (ICPADS), 2014, : 961 - 968
  • [34] A typing system for an optimizing multiple-backend Tcl compiler
    Rouse, F
    Christopher, W
    PROCEEDINGS OF THE FIFTH ANNUAL TCL/TK WORKSHOP, 1997, : 37 - 41
  • [35] GNU COMPILER COLLECTION BACKEND PORT FOR THE INTEGRAL PARALLEL ARCHITECTURE
    Hobincu, Radu
    Codreanu, Valeriu
    Petrica, Lucian
    UNIVERSITY POLITEHNICA OF BUCHAREST SCIENTIFIC BULLETIN SERIES C-ELECTRICAL ENGINEERING AND COMPUTER SCIENCE, 2012, 74 (03): : 79 - 92
  • [36] A LOD Backend Infrastructure for Scientific Search Portals
    Zapilko, Benjamin
    Boland, Katarina
    Kern, Dagmar
    SEMANTIC WEB (ESWC 2018), 2018, 10843 : 729 - 744
  • [37] Compiler-Assisted Checkpointing of Parallel Codes: The Cetus and LLVM Experience
    Rodriguez, Gabriel
    Martin, Maria J.
    Gonzalez, Patricia
    Tourino, Juan
    Doallo, Ramon
    INTERNATIONAL JOURNAL OF PARALLEL PROGRAMMING, 2013, 41 (06) : 782 - 805
  • [38] Compiler-Assisted Checkpointing of Parallel Codes: The Cetus and LLVM Experience
    Gabriel Rodríguez
    María J. Martín
    Patricia González
    Juan Touriño
    Ramón Doallo
    International Journal of Parallel Programming, 2013, 41 : 782 - 805
  • [39] A nanopass infrastructure for compiler education
    Sarkar, D
    Waddell, O
    Dybvig, RK
    ACM SIGPLAN NOTICES, 2004, 39 (09) : 201 - 212
  • [40] The C-- compiler infrastructure
    Ramsey, N
    Jones, SLP
    ACM SIGPLAN NOTICES, 2004, 39 (09) : 1 - 1
12345