Dataflow analysis for energy-efficient scratch-pad memory management

被引:0
|
作者
Chen, GY [1 ]
Kandemir, M [1 ]
机构
[1] Penn State Univ, Dept Comp Sci & Engn, University Pk, PA 16802 USA
关键词
Scratch Pad Memory (SPM); data flow analysis; compiler;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Scratch-Pad Memories (SPMs) are a serious alternative to conventional cache memories in embedded computing since they allow software to manage data flowing from and into memory components, resulting in a predictable behavior at runtime. The prior studies considered compiler-directed SPM management using both static and dynamic approaches. One of the assumptions under which most of the proposed approaches to data SPM management operate is that the application code is structured with regular loop nests with little or no control flow within the loops. This assumption, while it makes data SPM management relatively easy to implement, limits the applicability of those approachs to the codes involve conditional execution and complex control flows. To address this problem, this paper proposes a novel data SPM management strategy based on dataflow analysis. This analysis operates on a representation that reflects the conditional execution flow of the application and, consequently, it is applicable to a large class of embedded applications, including those with complex control flows.
引用
收藏
页码:327 / 330
页数:4
相关论文
共 50 条
  • [21] Performance oriented allocation scheme for scratch-pad memory
    National ASIC System, Engineering Technology Research Center, Southeast University, Nanjing 210096, China
    Tien Tzu Hsueh Pao, 2007, 8 (1558-1562):
  • [22] Energy efficiency of scratch-pad memory at 65 nm and below: An empirical study
    Takase, Hideki
    Tomiyama, Hiroyuki
    Zeng, Gang
    Takada, Hiroaki
    PROCEEDINGS OF THE INTERNATIONAL CONFERENCE ON EMBEDDED SOFTWARE AND SYSTEMS, 2008, : 93 - 97
  • [23] A decoupled architecture of processors with scratch-pad memory hierarchy
    Milidonis, A.
    Alachiotis, N.
    Porpodas, V.
    Michail, H.
    Kakarountas, A. P.
    Goutis, C. E.
    2007 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION, VOLS 1-3, 2007, : 612 - 617
  • [24] Energy efficiency of scratch-pad memory in deep submicron domains: an empirical study
    Takase, Hideki
    Tomiyama, Hiroyuki
    Zeng, Gang
    Takada, Hiroaki
    IEICE ELECTRONICS EXPRESS, 2008, 5 (23) : 1010 - 1016
  • [25] Exploiting scratch-pad memory using Presburger formulas
    Kandemir, M
    Kadayif, I
    Sezer, U
    ISSS'01: 14TH INTERNATIONAL SYMPOSIUM ON SYSTEM SYNTHESIS, 2001, : 7 - 12
  • [26] Automatic Analysis of Scratch-Pad Memory Code for Heterogeneous Multicore Processors
    Donaldson, Alastair F.
    Kroening, Daniel
    Ruemmer, Philipp
    TOOLS AND ALGORITHMS FOR THE CONSTRUCTION AND ANALYSIS OF SYSTEMS, PROCEEDINGS, 2010, 6015 : 280 - 295
  • [27] The Energy Optimization for Architectures with Limited Addressing Modes Using Scratch-Pad Memory
    Ling Ming
    Zhang Yang
    Mei Chen
    Pu Hanlai
    CHINESE JOURNAL OF ELECTRONICS, 2010, 19 (04): : 637 - 640
  • [28] Scratch-Pad Memory Banking for Energy Reduction in Embedded Signal Processing Systems
    Balasa, Florin
    Luican, Ilie I.
    Gingu, Cristian V.
    2013 IEEE 56TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS), 2013, : 844 - 847
  • [29] Optimal Data Placement for Memory Architectures with Scratch-Pad Memories
    Guo, Yibo
    Zhuge, Qingfeng
    Hu, Jingtong
    Sha, Edwin H. -M.
    TRUSTCOM 2011: 2011 INTERNATIONAL JOINT CONFERENCE OF IEEE TRUSTCOM-11/IEEE ICESS-11/FCST-11, 2011, : 1045 - 1050
  • [30] A scratch-pad memory aware dynamic loop scheduling algorithm
    Ozturk, Ozcan
    Kandemir, Mahmut
    Narayanan, Sri Hari Krishna
    ISQED 2008: PROCEEDINGS OF THE NINTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN, 2008, : 738 - +