Reversible Circuit Synthesis Using Binary Decision Diagrams

Reversible circuit synthesis is an important branch of low power consumption circuit design. The idea of a logic circuit without loss of information during computation has an impact on power consumption and on the other hand makes the use of classical circuit synthesis algorithms not applicable. In the area of reversible circuit design there is still lack of satisfactory algorithms. During last 15 years many heuristic algorithms have been developed, however, they construct circuit implementations which are far from optimal. In the paper a new implementation of the known transformation based algorithm is presented. The existing transformation based algorithms use truth table during computation. This leads to important memory restrictions on the algorithm. On the other hand any Boolean function can be represented using Binary Decision Diagrams (BBD). This representation is more compact and uses less memory than truth table representation. Presented new implementation of transformation based algorithm can be used for synthesis of much larger reversible functions than for original version of the algorithm.