Front-end module readout and control electronics for the PHENIX Multiplicity Vertex Detector

被引：3
|
作者：
Ericson, MN [1 ]
Allen, MD
Boissevain, J
Britton, CL
Emery, MS
Hahn, SF
Kapustinsky, JS
Lind, RE
Musrock, MS
Simon-Gillo, J
Smith, DE
Sullivan, JP
Van Hecke, H
Young, GR
Smith, MC
机构：
[1] Oak Ridge Natl Lab, Oak Ridge, TN 37831 USA
[2] Univ Calif Los Alamos Natl Lab, Los Alamos, NM 87545 USA
[3] Univ Tennessee, Knoxville, TN 37996 USA
来源：
IEEE TRANSACTIONS ON NUCLEAR SCIENCE | 1998年 / 45卷 / 03期
关键词：
D O I：
10.1109/23.682646
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Front-end module (FEM) readout and control are implemented as modular, high-density, reprogrammable functions in the PHENIX Multiplicity Vertex Detector. FEM control is performed by the heap manager, an FPGA-based circuit in the FEM unit. Each FEM has 256 channels of front-end electronics, readout, and control, all located on an MCM. Data readout, formatting, and control are performed by the heap manager along with 4 interface units that reside outside the MVD detector cylinder. This paper discusses the application of a generic heap manager and the addition of 4 interface module types to meet the specific control and data readout needs of the MVD. Unit functioning, interfaces, control timing, data format, and communication rates will be Fiber discussed in detail. Tn addition, subsystem issues regarding mode control, serial architecture and functions, error handling, Global and FPGA implementation and programming will be presented.
引用
收藏
页码：833 / 837
页数：5
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