Built-in self-test of FPGA interconnect

被引：109

作者：

Stroud, C ^{[1
]}

Wijesuriya, S ^{[1
]}

Hamilton, C ^{[1
]}

Abramovici, M ^{[1
]}

机构：

[1] Univ Kentucky, Dept Elect Engn, Lexington, KY 40506 USA

来源：

INTERNATIONAL TEST CONFERENCE 1998, PROCEEDINGS | 1998年

关键词：

D O I：

10.1109/TEST.1998.743180

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

We introduce the first BIST approach for testing the programmable routing network in FPGAs. Our method detects opens in, and shorts among, wiring segments, and also faults affecting the programmable switches that configure the FPGA interconnect. As a result, the BIST technique provides complete testing of interconnect faults.(1)

引用

页码：404 / 411

页数：8

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