A new CMOS 3.1-11.7 GHz low power LNA for ultra-wideband wireless applications

被引：9
|
作者：
Reja, Md. Mahbub [1 ]
Sellathamby, C. [1 ]
Filanovsky, Igor [2 ]
机构：
[1] Scanimetrics Inc, Edmonton, AB, Canada
[2] Univ Alberta, Edmonton, AB T6G 2M7, Canada
来源：
2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11 | 2007年
关键词：
ultra-wideband; low-noise amplifier; inter-stage design;
D O I：
10.1109/ISCAS.2007.378576
中图分类号：
TP18 [人工智能理论];
学科分类号：
081104 ; 0812 ; 0835 ; 1405 ;
摘要：
In this paper, a new 3.1 GHz to 11.7 GHz ultra-wide-band (UWB) low-noise amplifier (LNA) is designed in 0.18-mu m RF CMOS process. The proposed circuit includes a common-source cascode amplifier followed by an output buffer stage. Special attention is paid to design of inter-stage circuit employing the combined shunt and double-series inductive peaking bandwidth enhancement technique. The amplifier exhibits a forward gain (S21) of 11.0-11.5 dB, a noise figure (NF) of 3.6-4.4 dB, and input return loss (S11) of less than -9.3 dB over the frequency range of 3.1 GHz to 11.7 GHz while consuming only 6.2 mW from a power supply of 1.5 V.
引用
收藏
页码：1453 / +
页数：2
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