Stability/Performance Assessment of Monolithic 3D 6T/ST SRAM Cells Considering Transistor-Level Interlayer Coupling

被引：0

作者：

Fan, Ming-Long ^{[1
,2
]}

Hu, Vita Pi-Ho ^{[1
,2
]}

Chen, Yin-Nien ^{[1
,2
]}

Su, Pin ^{[1
,2
]}

Chuang, Ching-Te ^{[1
,2
]}

机构：

[1] Natl Chiao Tung Univ, Dept Elect Engn, Hsinchu, Taiwan

[2] Natl Chiao Tung Univ, Inst Elect, Hsinchu, Taiwan

来源：

PROCEEDINGS OF TECHNICAL PROGRAM - 2014 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATION (VLSI-TSA) | 2014年

关键词：

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

In this work, we investigate the impact of interlayer coupling on monolithic 3D 6T/8T SRAM cells with various layouts and tier combinations. Our results indicate that for 3D 6T SRAM cell with NFET in top layer, aligning upper-tier pull-down NFET with bottom-tier pull-up PFET enables better cell stability. For monolithic 3D 8T cell, an area-efficient 4N4P design is evaluated with optimized two-tier layout to enhance cell performance. We find that stacking NFET layer over the PFET tier results in larger design margins for SRAM cell stability and performance.

引用

页数：2

共 23 条

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