DVFS Pruning for Wireless NoC Architectures

被引：12
|
作者：
Murray, Jacob [1 ]
Tang, Nghia [2 ]
Pande, Partha Pratim [3 ]
Heo, Deukhyoun [4 ]
Shirazi, Behrooz A. [5 ]
机构：
[1] Washington State Univ, Dept EECS, Everett, WA USA
[2] Washington State Univ, Elect Engn, Pullman, WA 99164 USA
[3] Washington State Univ, Sch EECS, Comp Engn, Pullman, WA 99164 USA
[4] Washington State Univ, Dept EECS, Pullman, WA 99164 USA
[5] Washington State Univ, Sch EECS, Pullman, WA 99164 USA
来源：
IEEE DESIGN & TEST | 2015年 / 32卷 / 02期
基金：
美国国家科学基金会;
关键词：
D O I：
10.1109/MDAT.2014.2357397
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
The millimeter wave small world network on a chip is an emerging paradigm to design low power and high-bandwidth massive multicore chips. By reducing the hop count between largely separated communicating cores, wireless shortcuts in mSWNoC have been shown to carry a significant amount of the overall traffic within the network. The amount of traffic detoured in this way is substantial and the low power wireless links enable energy savings [1]. The overall energy dissipation and thermal profile of the mSWNoC can be improved even further if the characteristics of the wireline links and associated switches are optimized according to the traffic patterns. Dynamic voltage and frequency scaling (DVFS) is a popularmethodology to optimize the power usage/heat dissipation of electronic systems without significantly compromising overall system performance. We have already demonstrated that DVFS enables improvement of power and thermal profiles of mSWNoC-enabled multicore chips. © 2015 IEEE.
引用
收藏
页码：29 / 38
页数：10
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