Scalable equivalent circuit PHEMT modelling using an EM-based parasitic network description

被引:0
|
作者
Resca, D. [1 ]
Santarelli, A. [1 ]
Raffo, A. [2 ]
Cignani, R. [1 ]
Vannini, G. [2 ]
Filicori, F. [1 ]
机构
[1] Univ Bologna, DEIS, Viale Risorgimento 2, I-40136 Bologna, Italy
[2] Univ Ferrara, Dept Engn, I-44100 Ferrara, Italy
关键词
computer aided engineering; electromagnetic analysis; millimetre-wave FETs; semiconductor device modeling;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Electron device modelling requires the accurate identification of a suitable parasitic network accounting for the passive structures which connect the intrinsic electron device to the external world. In conventional approaches, the parasitic network is described by a proper topology of lumped elements. As an alternative, a distributed description of the parasitic network can be conveniently adopted. In particular, the latter solution is the better choice when dealing with device scaling and very high operating frequencies. In this paper the parasitic network is described by means of a suitable distributed network identified through electromagnetic simulations of the device layout. It is shown how the adoption of a distributed instead of a lumped description leads to a more accurate equivalent-circuit-based electron device model. The good scalability properties of the approach are also presented through experimental results.
引用
收藏
页码:280 / +
页数:2
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