Advanced CMOS transistors in the nanotechnology era for high-performance, low-power logic applications

被引:0
|
作者
Chau, R [1 ]
Doczy, M [1 ]
Doyle, B [1 ]
Datta, S [1 ]
Dewey, G [1 ]
Kavalieros, J [1 ]
Jin, B [1 ]
Metz, M [1 ]
Majumdar, A [1 ]
Radosavljevic, M [1 ]
机构
[1] Intel Corp, Comonents Res, Log Technol Dev, Hillsboro, OR 97124 USA
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Sustaining Moore's Law requires continual transistor miniaturization. Through silicon innovations and breakthroughs, CMOS transistor scaling and Moore's Law will continue at least through early next decade. By combining silicon innovations with other novel nanotechnologies on the same Si platform, it is expected that Moore's Law will extend well into the next decade. This paper describes the most recent advances made in silicon CMOS transistor technology and discusses the challenges and opportunities presented by the recent emerging nanoelectronic devices such as carbon nanotube field-effect transistors (FET), Si-nanowire FETs and III-V FETs for high-performance, low-power logic applications.
引用
收藏
页码:26 / 30
页数:5
相关论文
共 50 条
  • [41] Ballistic transport in sub-10 nm monolayer planar GaN transistors for high-performance and low-power applications
    Wang, Boyu
    Ning, Jing
    Zhang, Jincheng
    Wang, Dong
    Yang, Xinyi
    Jia, Yanqing
    Zhang, Chi
    Zeng, Yu
    Hao, Yue
    APPLIED PHYSICS LETTERS, 2021, 119 (16)
  • [42] High-performance low-power FFT cores
    Han, Wei
    Erdogan, Ahmet T.
    Arslan, Tughrul
    Hasan, Mohd.
    ETRI JOURNAL, 2008, 30 (03) : 451 - 460
  • [43] CMOS comparators for high-speed and low-power applications
    Menendez, Eric R.
    Maduike, Dumezie K.
    Garg, Rajesh
    Khatri, Sunil P.
    PROCEEDINGS 2006 INTERNATIONAL CONFERENCE ON COMPUTER DESIGN, 2007, : 76 - +
  • [44] Double-gate SOI devices for low-power and high-performance applications
    Roy, K
    Mahmoodi, H
    Mukhopadhyay, S
    Ananthan, H
    Bansal, A
    Cakici, T
    19TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS, 2005, : 445 - 452
  • [45] Toward High-Performance Polymer Photovoltaic Devices for Low-Power Indoor Applications
    Yang, Shun-Shing
    Hsieh, Zong-Chun
    Keshtov, Muchamed L.
    Sharma, Ganesh D.
    Chen, Fang-Chung
    SOLAR RRL, 2017, 1 (12):
  • [46] High-Performance 10-Transistor Adder Cell for Low-Power Applications
    Misra, Aishani
    Birla, Shilpi
    Singh, Neha
    Dargar, Shashi Kant
    IETE JOURNAL OF RESEARCH, 2023, 69 (11) : 8318 - 8336
  • [47] Double-gate SOI devices for low-power and high-performance applications
    Roy, K
    Mahmoodi, H
    Mukhopadhyay, S
    Ananthan, H
    Bansal, A
    Cakici, T
    ICCAD-2005: INTERNATIONAL CONFERENCE ON COMPUTER AIDED DESIGN, DIGEST OF TECHNICAL PAPERS, 2005, : 217 - 224
  • [48] A high-performance, low-power Sigma triangle ADC for digital audio applications
    Hao, Luo
    Yan, Han
    Cheung, Ray C. C.
    Han Xiaoxia
    Ma Shaoyu
    Ying Peng
    Zhu Dazhong
    JOURNAL OF SEMICONDUCTORS, 2010, 31 (05) : 0550091 - 0550097
  • [49] Computation sharing programmable FIR filter for low-power and high-performance applications
    Park, J
    Jeong, W
    Mahmoodi-Meimand, H
    Wang, YT
    Choo, H
    Roy, K
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2004, 39 (02) : 348 - 357
  • [50] ACL. . . ADVANCED CMOS LOGIC THAT LENGTHENS THE STRIDE OF LOW-POWER SYSTEMS.
    Croes, R.
    de Pagter, A.
    Electronic components & applications, 1987, 8 (02): : 66 - 75