A time-delay jitter-insensitive continuous-time bandpass ΔΣ modulator architecture

被引：9
|
作者：
Pulincherry, A [1 ]
Hufford, M
Naviasky, E
Moon, UK
机构：
[1] Qualcomm Inc, San Diego, CA 92121 USA
[2] CadenceDesign Serv, Columbia, MD 21045 USA
[3] Oregon State Univ, Sch Elect Engn & Comp Sci, Corvallis, OR 97331 USA
来源：
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS | 2005年 / 52卷 / 10期
关键词：
bandpass continuous time; delta-sigma (Delta Sigma); frequency translating; time-delay jitter;
D O I：
10.1109/TCSII.2005.850746
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this paper, we present a new continuous-time bandpass delta-sigma (Delta Sigma) modulator architecture with mixer inside the feedback loop. The proposed bandpass Delta Sigma modulator is insensitive to time-delay jitter in the digital-to-analog conversion feedback pulse, unlike conventional continuous-time bandpass Delta Sigma modulators. The sampling frequency of the proposed Delta Sigma modulator can be less than the center frequency of the input narrow-band signal.
引用
收藏
页码：680 / 684
页数：5
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