Robustness of logic gates and reconfigurability of neuromorphic switching networks

被引：0
|
作者：
Chiragwandi, Zackary [1 ]
Skoldberg, Jonas [1 ]
Wendin, Goran [1 ]
机构：
[1] Chalmers, Dept Microtechnol & Nanosci MC2, SE-41296 Gothenburg, Sweden
来源：
2010 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS | 2010年
关键词：
DEVICES; MEMORY;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Nanoparticle networks with functional molecular links that show current- voltage characteristics (IVC) with negative differential resistance (NDR) can be trained to perform XOR-AND logic gates (Husband et al. [1]; Skoldberg and Wendin [2]). In this work we investigate the robustness of the Nanocell network by removing links until desired logic gates no longer can be configured or operated within our simulation of the network. We present results for the robustness of XOR-AND configured (halfadder) Nanocells, as well as the effects of varying the IVC and NDR characteristics of the linker molecules.
引用
收藏
页码：1671 / 1674
页数：4
相关论文
共 50 条
  • [41] Tunable and Reconfigurable Logic Gates With Electrolyte-Gated Transistor Array Co-Integrated With Neuromorphic Synapses
    Yu, Ji-Man
    Lee, Chungryeol
    Han, Joon-Kyu
    Lee, Sang-Won
    Kim, Moon-Seok
    Im, Sung Gap
    Choi, Yang-Kyu
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2022, 69 (08) : 4231 - 4235
  • [42] Realizing logic gates with time-delayed synthetic genetic networks
    Amit Sharma
    Vivek Kohar
    Manish Dev Shrimali
    Sudeshna Sinha
    [J]. Nonlinear Dynamics, 2014, 76 : 431 - 439
  • [43] Realizing logic gates with time-delayed synthetic genetic networks
    Sharma, Amit
    Kohar, Vivek
    Shrimali, Manish Dev
    Sinha, Sudeshna
    [J]. NONLINEAR DYNAMICS, 2014, 76 (01) : 431 - 439
  • [44] Computational paradigms in nanoelectronics: Quantum coupled single electron logic and neuromorphic networks
    Bandyopadhyay, S
    Roychowdhury, V
    [J]. JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 1996, 35 (6A): : 3350 - 3362
  • [45] Neuromorphic Logic Networks and Robust Stochastic Computing Under Large Perturbations and Uncertainties
    Tran, A. H.
    Yanushkevich, S. N.
    Lyshevski, S. E.
    Shmerko, V. P.
    [J]. NANOTECHNOLOGY 2011: ELECTRONICS, DEVICES, FABRICATION, MEMS, FLUIDICS AND COMPUTATIONAL, NSTI-NANOTECH 2011, VOL 2, 2011, : 690 - 693
  • [46] Physical Architectures for packet-switching network nodes based on nonlinear logic gates
    Teimoori, Hassan
    Apostolopoulos, Dimitrios
    Vlachos, Kyriakos
    Ware, Cedric
    Petrantonakis, Dimitrios
    Yiannopoulos, Kostas
    Stampoulidis, Leontios
    Avramopoulos, Hercules
    Erasme, Didier
    [J]. CSNDSP 08: PROCEEDINGS OF THE SIXTH INTERNATIONAL SYMPOSIUM ON COMMUNICATION SYSTEMS, NETWORKS AND DIGITAL SIGNAL PROCESSING, 2008, : 676 - +
  • [47] Multiconfi gurable Logic Gates Based on Fluorescence Switching in Adaptive Coordination Polymer Nanoparticles
    Pu, Fang
    Ju, Enguo
    Ren, Jinsong
    Qu, Xiaogang
    [J]. ADVANCED MATERIALS, 2014, 26 (07) : 1111 - 1117
  • [48] Logic gates and optical switching with vertical-cavity surface-emitting lasers
    Prati, F
    Travagnin, M
    Lugiato, LA
    [J]. PHYSICAL REVIEW A, 1997, 55 (01): : 690 - 700
  • [49] Computational paradigms in nanoelectronics: quantum coupled single electron logic and neuromorphic networks
    Bandyopadhyay, Supriyo
    Roychowdhury, Vwani
    [J]. Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes & Review Papers, 1996, 35 (6 A): : 3350 - 3362
  • [50] Counterfactual logic gates
    Li, Zheng-Hong
    Ji, Xiao-Fei
    Asiri, Saeed
    Wang, Luojia
    Al-Amri, M.
    [J]. PHYSICAL REVIEW A, 2020, 102 (02)
12345