Hierarchical Modeling Using Generalized Linear Models

被引:5
|
作者
Kumar, Naveen [2 ]
Mastrangelo, Christina [1 ]
Montgomery, Doug [3 ]
机构
[1] Univ Washington, Seattle, WA 98195 USA
[2] Intel Corp, Hillsboro, OR 97124 USA
[3] Arizona State Univ, Tempe, AZ USA
关键词
generalized linear models; hierarchical modeling; semiconductor manufacturing; variance and bias estimation;
D O I
10.1002/qre.1176
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
In a complex manufacturing environment, there are hundreds of interrelated processes that form a complex hierarchy. This is especially true of semiconductor manufacturing. In such an environment, modeling and understanding the impact of critical process parameters on final performance measures such as defectivity is a challenging task. In addition, a number of modeling issues such as a small number of observations compared to process variables, difficulty in formulating a high-dimensional design matrix, and missing data due to failures pose challenges in using empirical modeling techniques such as classical linear modeling as well as generalized linear modeling (GLM) approaches. Our approach is to utilize GLM in a hierarchical structure to understand the impact of key process and subprocess variables on the system output. A two-level approach, comprising subprocess modeling and meta-modeling, is presented and modeling related issues such as bias and variance estimation are considered. The hierarchical GLM approach helps not only in improving output measures, but also in identifying and improving subprocess variables attributed to poor output quality. Copyright (C) 2011 John Wiley & Sons, Ltd.
引用
收藏
页码:835 / 842
页数:8
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