A CMOS ΔΣ fractional-N frequency synthesizer with quantization noise pushing technique

被引：3
|
作者：
Yang, Yu-Che [1 ]
Lu, Shey-Shi [1 ]
机构：
[1] Natl Taiwan Univ, Grad Inst Elect Engn, Taipei 10764, Taiwan
来源：
2007 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS | 2007年
关键词：
Delta Sigma; quantization noise; frequency synthesizer and phase-locked loops;
D O I：
10.1109/VLSIC.2007.4342743
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A Delta Sigma fractional-N frequency synthesizer with a quantization noise pushing technique is implemented in a 0.18um CMOS technology. The in-band phase noise can be lowered by 12 dB, and the out-band phase noise contributed by the Delta Sigma modulator can be reduced by more than 15dB with this technique. The power consumption is 26.8mW from a 2V supply.
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页码：262 / 263
页数：2
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