Comparative Study of Single Gate and Double Gate Fully Depleted Silicon on Insulator MOSFET

In this paper, a comparison between Single Gate Fully Depleted SOI (SGSOI) and Double Gate Fully Depleted SOI (DGSOI) MOSFET with Si3N4 Spacer (insulator) around the Gate electrode at various different technology nodes are investigated. Simulations are done in ATLAS package of SIV ACO tool. Further in this work, study of SON Devices (structure with air in place of buried oxide is termed as Silicon on Nothing (SON) are carried out. Simulation of Different values of Drive Current (I-on), Leakage Current (I-off) and Transfer Characteristics (Id/Vg) are analysed in addition to compare and get a suitable conclusion of this study. For comparing the suppressed values of Short Channel Effects, Drain Induced Barrier Lowering (DIBL) with these different structuresarecalculated. All the structures are simulated for Single Gate as well as Double Gate in nanometerregime. Comparative results are given on the basis of the simulated results received by the double gate structure with Vertical Source and Drain (SD). Effect of Channel length reduction on its transfer characteristics and short channel effects are also studied. It has been found that SON structure shows larger threshold voltage value but small drive current as compare to SOI structures. Hence due to its low leakage current, it seems to be better for low power applications. Double gate SOI structure shows a sufficient drive current and less leakage current as compare to single gate SOI. For analysing the performance of the devices, Shockley-Read-Hall (SRH) Recombination, Radiative, Auger, and Surface Recombination models are deployed.