Nano scale computational architectures with Spin Wave Bus

被引:181
|
作者
Khitun, A [1 ]
Wang, KL [1 ]
机构
[1] Univ Calif Los Angeles, MARCO Focus Ctr Funct Engineered Nano Architecton, Dept Elect Engn, Device Res Lab, Los Angeles, CA 90095 USA
关键词
nanotechnology; spin waves; logic device;
D O I
10.1016/j.spmi.2005.07.001
中图分类号
O469 [凝聚态物理学];
学科分类号
070205 ;
摘要
We propose and analyze a new kind of nano scale computational architectures using spin waves as a physical mechanism for device interconnection. Information is encoded into the phase of spin waves propagating in a ferromagnetic film - a Spin Wave Bus. We describe several possible logic devices utilizing spin waves. The performance of the proposed devices is illustrated by numerical modeling based on the experimental data for spin wave excitation and propagation in NiFe film. The key advantage of the proposed architectures is that information transmission is accomplished without charge transfer. Potentially, the architectures with Spin Wave Bus may be beneficial in terms of power consumption and resolve the interconnect problem. Another expected benefit is in the enhanced logic functionality. Using phase logic, it is possible to realize a number of logic functions in one device. These advantages make the architectures with a Spin Wave Bus very promising for application in ultra-high-density integrated circuits (more than 10(10) devices per square inch). (C) 2005 Elsevier Ltd. All rights reserved.
引用
收藏
页码:184 / 200
页数:17
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