Self-Aligned Gate-First In0.7Ga0.3As n-MOSFETs with an InP Capping Layer for Performance Enhancement

被引：12

作者：

Gong, Xiao ^{[1
]}

Ivana ^{[1
]}

Chin, Hock-Chun ^{[1
]}

Zhu, Zhu ^{[1
]}

Lin, You-Ru ^{[2
]}

Ko, Chih-Hsin ^{[2
]}

Wann, Clement H. ^{[2
]}

Yeo, Yee-Chia ^{[1
]}

机构：

[1] Natl Univ Singapore, Singapore 117576, Singapore

[2] Taiwan Semicond Mfg Co, Hsinchu 201616, Taiwan

来源：

ELECTROCHEMICAL AND SOLID STATE LETTERS | 2011年 / 14卷 / 03期

基金：

新加坡国家研究基金会;

关键词：

D O I：

10.1149/1.3526139

中图分类号：

O646 [电化学、电解、磁化学];

学科分类号：

081704 ;

摘要：

We report the first demonstration of InP-capped In0.7Ga 0.3 As channel n-metal-oxide-semiconductor field-effect transistors (MOSFETs) using a self-aligned gate-first process. MOSFETs with the gate length LG down to 350 nm were fabricated, and the dependence of device performance on the InP thickness (2 and 4 nm) was investigated. InP capping leads to a significant reduction in the subthreshold swing S. Transconductance and saturation drain current are enhanced in n-MOSFETs with the InP-capped In 0.7Ga0.3 As channel as compared with those without InP capping, indicating an increased electron mobility in the In 0.7Ga0.3 As channel due to the InP capping. © 2010 The Electrochemical Society.

引用

页码：H117 / H119

页数：3

共 25 条

[1] Reduction of Off-State Leakage Current in In0.7Ga0.3As Channel n-MOSFETs with Self-Aligned Ni-InGaAs Contact Metallization
Zhang, Xingui
Guo, Huaxin
Lin, Hau-Yu
Ivana
Gong, Xiao
Zhou, Qian
Lin, You-Ru
Ko, Chih-Hsin
Wann, Clement H.
Yeo, Yee-Chia
ELECTROCHEMICAL AND SOLID STATE LETTERS, 2011, 14 (05) : H212 - H214
[2] In0.7Ga0.3As Channel n-MOSFET with Self-Aligned Ni-InGaAs Source and Drain
Zhang, Xingui
Guo, Huaxin
Gong, Xiao
Zhou, Qian
Lin, You-Ru
Lin, Hau-Yu
Ko, Chih-Hsin
Wann, Clement H.
Yeo, Yee-Chia
ELECTROCHEMICAL AND SOLID STATE LETTERS, 2011, 14 (02) : H60 - H62
[3] Gate Length Variation Effect on Performance of Gate-First Self-Aligned In0.53Ga0.47As MOSFET
Wee, Mohd F. Mohd Razip
Dehzangi, Arash
Bollaert, Sylvain
Wichmann, Nicolas
Majlis, Burhanuddin Y.
PLOS ONE, 2013, 8 (12):
[4] Improving threshold voltage and device performance of gate-first HfSiON/Metal gate n-MOSFETs by an ALD La2O3 capping layer
Kamiyama, Satoshi
Kurosawa, Etsuo
Nara, Yasuo
JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 2008, 155 (06) : H373 - H377
[5] Scaling properties of In0.7Ga0.3As buried-channel MOSFETs with atomic layer deposited gate dielectric
Xue, F.
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Zhou, F.
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ELECTRONICS LETTERS, 2010, 46 (25) : 1694 - 1695
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Zhang, Xingui
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Yeo, Yee-Chia
ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY, 2012, 1 (02) : P82 - P85
[7] Multiple-gate In0.53Ga0.47As Channel n-MOSFETs with Self-Aligned Ni-InGaAs Contacts
Zhang, Xingui
Guo, Hua Xin
Gong, Xiao
Guo, Cheng
Yeo, Yee-Chia
GRAPHENE, GE/III-V, NANOWIRES, AND EMERGING MATERIALS FOR POST-CMOS APPLICATIONS 4, 2012, 45 (04): : 209 - 216
[8] A High Performance In0.7Ga0.3As MOSFET with an InP Barrier Layer for Radio-Frequency Application
Chang Hu-Dong
Liu Gui-Ming
Sun Bing
Zhao Wei
Wang Wen-Xin
Liu Hong-Gang
CHINESE PHYSICS LETTERS, 2013, 30 (03)
[9] High-Performance Gate-First Epitaxial Ge n-MOSFETs on Si With LaAlO3 Gate Dielectrics
Chen, W. B.
Cheng, C. H.
Chin, Albert
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2010, 57 (12) : 3525 - 3530
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Sun, Yanning
Kiewra, E. W.
Koester, S. J.
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Fompeyrine, J.
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Germann, R.
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IEEE ELECTRON DEVICE LETTERS, 2007, 28 (06) : 473 - 475

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