Digital video broadcast transceiver deployment to Xilinx FPGAs using LabVIEW

DVB-T is a European digital television standard that uses OFDM modulation. Software models of DVB-T typically use C++ or some other sequential, behavioral language or environment. Significant performance improvements can be realized by accelerating parts of the algorithm in hardware. In this paper, we document the process of taking parts of the sequential model and translating them into efficient, pipelined RTL implementations on Xilinx FPGAs. We use the LabVIEW graphical dataflow programming environment for both the software and hardware implementations. Furthermore we use an included synchronous reactive construct to easily model and efficiently implement the hardware components.