All-Digital Synchronization for SC/OFDM Mode of IEEE 802.15.3c and IEEE 802.11ad

被引：44
|
作者：
Liu, Wei-Chang [1 ]
Wei, Ting-Chen [1 ]
Huang, Ya-Shiue [1 ]
Chan, Ching-Da [1 ]
Jou, Shyh-Jye [1 ]
机构：
[1] Natl Chiao Tung Univ, Dept Elect Engn, Hsinchu 300, Taiwan
来源：
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS | 2015年 / 62卷 / 02期
关键词：
CFO; IEEE; 802.11ad; 802.15.3c; OFDM; preamble detection; SC; SFO; symbol boundary detection; synchronization; 60; GHz; 60-GHZ CMOS TRANSCEIVER; BASEBAND RECEIVER; DOMAIN EQUALIZER; ANALOG;
D O I：
10.1109/TCSI.2014.2361035
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this paper, a detection and estimation scheme and its architecture design for synchronization in 60 GHz indoor wireless transmission are presented. With the complementary Golay sequence based preamble structure, the proposed synchronization scheme is designed to detect the preamble and symbol boundary, estimate the frequency offset within a unified architecture. For the very high sampling speed at 60 GHz transmission, the architecture is designed as 8x-parallelism with feed-forward data path. This architecture supports the single carrier (SC) and orthogonal frequency-division multiplexing (OFDM) transmissions of both IEEE 802.15.3c and IEEE 802.11ad standards. The synchronization module is implemented as a part of a digital baseband receiver for IEEE 802.15.3c. The tolerance of maximum frequency offset is about 114.58 ppm and 171.87 ppm for SC and OFDM mode, respectively. The implementation result shows that it takes about 0.84 mm(2) of area (equivalent to 307 k gate counts). The power consumption is about 59 mW in SC mode and 96 mW in OFDM (HSI) mode when operating at 1.76 GHz and 2.64 GHz chip rate, respectively.
引用
收藏
页码：545 / 553
页数：9
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