Analog Placement Constraint Extraction and Exploration with the Application to Layout Retargeting

In analog/mixed-signal (AMS) integrated circuits (ICs), most of the layout design efforts are still handled manually, which is time-consuming and error-prone. Given the previous high-quality manual layouts containing valuable design expertise of experienced designers, exploring layout design constraints from the existing layouts is desirable. In this paper, we extract and explore analog placement constraints from previous quality-approved layouts, including regularity and symmetry (symmetry-island) constraints. For the first time, an efficient sweep line-based algorithm is developed to comprehensively extract the regularity constraints in a given analog placement, which can not only improve routability but also minimize the layout parasitics-induced circuit performance degradation. Furthermore, we propose a novel layout technology migration and performance retargeting framework, where we apply the constraint extraction algorithms to improve the placement quality while preserving previous design expertise. Experimental results show that the proposed techniques can preserve the symmetry and regularity constraints, and also reduce the placement area by 7.6% on average.