Mechanism of power dissipation capability of power MOSFET devices: Comparative study between LDMOS and VDMOS transistors

被引：0

作者：

Chung, YS ^{[1
]}

Valenzuela, O ^{[1
]}

Baird, B ^{[1
]}

机构：

[1] Motorola Inc, Semicond Prod Sector, DigitalDNA Lab, SMARTMOS Technol Ctr, Mesa, AZ 85202 USA

来源：

ISPSD'01: PROCEEDINGS OF THE 13TH INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES & ICS | 2001年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Interaction between the electrical power and thermal energy generated due to power dissipation is fundamental in understanding the safe operating limit of the semiconductor devices in both transient and steady-state operations. This work deals with details of the power dissipation process from the device structure aspects. The power dissipation capability of the lateral DMOS device is compared to that of the vertical DMOS device for a given technology through theoretical and experimental analyses. The comparative study in the transient power capability between two different device structures provides interesting clues to understand the problem of the power dissipation mechanics of the power devices.

引用

页码：275 / 278

页数：4

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