Remote Reconfigurable Wireless Sensor Node Design for Wireless Sensor Network

被引:0
|
作者
Natheswaran, S. [1 ]
Athisha, G. [2 ]
机构
[1] PSNA Coll Engn & Technol, ME VLSI DESIGN, Dindigul 624622, Tamil Nadu, India
[2] PSNA Coll Engn & Technol, Dept Elect & Commun Engn, Dindigul 624622, Tamil Nadu, India
关键词
FPGA technology; multi cycle architecture; Reconfiguration; Sensor network; Soft core processor;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Wireless sensor nodes are used in variety of applications and their requirements are not fully known to the designer during the design and development stage. Similarly wireless sensor node consists of number of off-the-shelve components which increases the power consumption of the wireless sensor node. So in this paper a wireless sensor node with a soft core processor and remote hardware reconfiguration facilities is proposed. The proposed architecture will provide over-the-air remote modification facilities even after the deployment of the wireless sensor node. FPGA is used in the wireless sensor node design in order to increase the processing capabilities of the system to meet the target applications. The challenges and the design concept of the proposed wireless sensor node are presented in this paper.
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页数:4
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