A Hybrid Integrated TIA and PD for 20-Gb/s Optical Receivers

被引:0
|
作者
Yang, Qianqian [1 ]
Qi, Nan [1 ]
Wang, Juncheng [1 ]
Wang, Zhongkai [1 ]
Hong, Zhiliang [1 ]
Chiang, Patrick [1 ,2 ]
机构
[1] Fudan Univ, ASIC & Syst State Key Lab, Shanghai 201203, Peoples R China
[2] Oregon State Univ, Sch Elect Engn & Comp Sci, Corvallis, OR 97331 USA
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中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A 20Gb/s Transimpedance Amplifier (TIA) is implemented in 65nm CMOS process using input-serial-peaking technique. Measurement results show that the hybrid integrated TIA with PD achieves up to 20Gb/s clean optical-diagram, with 4.3ps RMS-jitter, consuming 7.2mW.
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页数:3
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