Hardware Implementation of Visible Watermarking

被引：0

作者：

Pandurangan, Raji ^{[1
]}

Logashanmugam, E. ^{[2
]}

Kumar, T. V. U. Kiran ^{[3
]}

机构：

[1] Sathyabhama Univ, Madras, Tamil Nadu, India

[2] Sathyabhama Univ, Fac Elect & Elect, Madras, Tamil Nadu, India

[3] Sathyabhama Univ, Fac Elect & Elect, Madras, Tamil Nadu, India

来源：

2015 INTERNATIONAL CONFERENCE ON COMPUTATION OF POWER, ENERGY, INFORMATION AND COMMUNICATION (ICCPEIC) | 2015年

关键词：

FPGA; Image watermarking; Reversible watermarking; TFT Display;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Development of Personal Computers and Cloud Computing, Internet of Things is making duplicating the data very feasible. In this paper we are proposing visible watermarking using FPGA which provides one to one compound mapping that allows reversible watermarking. This method can be applied for different types of host images like binary, opaque monochrome and translucent full color ones. The ultimate objective of the research is to develop low power, high performance, real-time, reliable and secured watermarking system which can provide robustness over certain attacks namely cover-up attack, cropping noise, scaling and geometric attacks.

引用

页码：400 / 402

页数：3

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