Impact of process variation induced transistor mismatch on sense amplifier performance

被引:0
|
作者
Rodrigues, Steevan [1 ]
Bhat, M. S. [1 ]
机构
[1] NITK, Dept Elect & Commun Engn, Surathkal 575025, India
关键词
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Sense amplifier is a very critical peripheral circuit in memories as its performance strongly affects both memory access time, and overall memory power dissipation. As the device dimensions scale below 100nm, the process variations are increasing and are impacting the circuit design significantly. The circuit yield loss caused by the process and device parameter variation has been more pronounced than before [1]. In this paper, effects of process variation induced transistor mismatch on sense amplifier performance are studied. A comparative study of the effect of mismatch on delay and yield for different sense amplifier configurations at 90nm technology is presented.
引用
收藏
页码:484 / 489
页数:6
相关论文
共 50 条
  • [1] Impact of Stochastic Mismatch on FinFETs SRAM Cell Induced by Process Variation
    Yu, Shimeng
    Zhao, Yuning
    Du, Gang
    Kang, Jinfeng
    Han, Ruqi
    Liu, Xiaoyan
    [J]. EDSSC: 2008 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS, 2008, : 281 - 284
  • [2] An innovative sub-32nm SRAM current sense amplifier in double-gate CMOS insensitive to process variations and transistor mismatch
    Makosiej, Adam
    Nasalski, Piotr
    Giraud, Bastien
    Vladimirescu, Andrei
    Amara, Amara
    [J]. 2008 IEEE INTERNATIONAL CONFERENCE ON INTEGRATED CIRCUIT DESIGN AND TECHNOLOGY, PROCEEDINGS, 2008, : 47 - +
  • [3] A Process Variation Tolerant Self-Compensating Sense Amplifier Design
    Choudhary, Aarti
    Kundu, Sandip
    [J]. 2009 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI, 2009, : 263 - 267
  • [4] Integral Impact of BTI and Voltage Temperature Variation on SRAM Sense Amplifier
    Agbo, Innocent
    Taouil, Mottaqiallah
    Hamdioui, Said
    Kukner, Halil
    Weckx, Pieter
    Raghavan, Praveen
    Catthoor, Francky
    [J]. 2015 IEEE 33RD VLSI TEST SYMPOSIUM (VTS), 2015,
  • [5] Integral Impact of BTI, PVT Variation, and Workload on SRAM Sense Amplifier
    Agbo, Innocent
    Taouil, Mottaqiallah
    Kraak, Daniel
    Hamdioui, Said
    Kukner, Halil
    Weckx, Pieter
    Raghavan, Praveen
    Catthoor, Francky
    [J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017, 25 (04) : 1444 - 1454
  • [6] Impact of Transistor Aging Effects on Sense Amplifier Reliability in Nano-Scale CMOS
    Menchaca, Roberto
    Mahmoodi, Hamid
    [J]. 2012 13TH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED), 2012, : 342 - 346
  • [7] MISMATCH SENSITIVITY OF A SIMULTANEOUSLY LATCHED CMOS SENSE AMPLIFIER
    SARPESHKAR, R
    WYATT, JL
    LU, NC
    GERBER, PD
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1991, 26 (10) : 1413 - 1422
  • [9] Variation Resilient High Performance and Low Voltage Single Ended Sense Amplifier
    Rao, Raviprakash S.
    Ali, Shahid
    [J]. 2014 IEEE DALLAS CIRCUITS AND SYSTEMS CONFERENCE (IEEE DCAS 2014), 2014,
  • [10] ANALYSIS OF MISMATCH SENSITIVITY IN A SIMULTANEOUSLY LATCHED CMOS SENSE AMPLIFIER
    SARPESHKAR, R
    WYATT, JL
    LU, NC
    GERBER, PD
    [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 1992, 39 (05): : 277 - 292