共 50 条
- [1] Impact of Stochastic Mismatch on FinFETs SRAM Cell Induced by Process Variation [J]. EDSSC: 2008 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS, 2008, : 281 - 284
- [2] An innovative sub-32nm SRAM current sense amplifier in double-gate CMOS insensitive to process variations and transistor mismatch [J]. 2008 IEEE INTERNATIONAL CONFERENCE ON INTEGRATED CIRCUIT DESIGN AND TECHNOLOGY, PROCEEDINGS, 2008, : 47 - +
- [3] A Process Variation Tolerant Self-Compensating Sense Amplifier Design [J]. 2009 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI, 2009, : 263 - 267
- [4] Integral Impact of BTI and Voltage Temperature Variation on SRAM Sense Amplifier [J]. 2015 IEEE 33RD VLSI TEST SYMPOSIUM (VTS), 2015,
- [6] Impact of Transistor Aging Effects on Sense Amplifier Reliability in Nano-Scale CMOS [J]. 2012 13TH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED), 2012, : 342 - 346
- [8] Mismatch sensitivity of a simultaneously latched CMOS sense amplifier [J]. Sarpeshkar, Rahul, 1600, (26):
- [9] Variation Resilient High Performance and Low Voltage Single Ended Sense Amplifier [J]. 2014 IEEE DALLAS CIRCUITS AND SYSTEMS CONFERENCE (IEEE DCAS 2014), 2014,
- [10] ANALYSIS OF MISMATCH SENSITIVITY IN A SIMULTANEOUSLY LATCHED CMOS SENSE AMPLIFIER [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 1992, 39 (05): : 277 - 292