Video-Active RAM: A Processor-in-Memory Architecture for Video Coding Applications

被引：0

作者：

Sayed, Mohammed ^{[1
]}

Badawy, Wael ^{[2
]}

Jullien, Graham ^{[3
]}

机构：

[1] Zagazig Univ, Dept Elect & Commun Engn, Zagazig, Egypt

[2] Intelliview Technol Inc, Calgary, AB, Canada

[3] Univ Calgary, Dept Elect & Comp Engn, Calgary, AB T2N 1N4, Canada

来源：

2010 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS | 2010年

基金：

加拿大自然科学与工程研究理事会;

关键词：

MOTION ESTIMATION; HARDWARE IMPLEMENTATION; EFFICIENT; DESIGN;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents the Video-Active RAM (VA-RAM) architecture for video coding applications. VA-RAM is a processor-in-memory architecture customized for video coding applications. The VA-RAM architecture has been used to implement several video coding algorithms. A prototype of the VA-RAM for block-based integer-pixel ME has been fabricated using the TSMC 0.18 mu m CMOS technology. The architecture uses 89,687 gates and 18,976 bits of on-chip memory. At a maximum clock frequency of 125 MHz, the fabricated chip is able to process 15 4CIF fps. It consumes 84.68 mW at 125 MHz and has core area of 2.9 mm(2).

引用

页码：2968 / 2971

页数：4

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