HDL based simulation of digital RF frequency synthesizers

被引：0

作者：

Neyer, A ^{[1
]}

Sappok, S ^{[1
]}

Heinen, S ^{[1
]}

机构：

[1] Rhein Westfal TH Aachen, Integrated Analog Circuits, D-52074 Aachen, Germany

来源：

BMAS 2005: Proceedings of the 2005 IEEE International Behavioral Modeling and Simulation Workshop | 2005年

关键词：

D O I：

10.1109/BMAS.2005.1518184

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper proposes modelling and simulation requirements for mixed-signal RF transceivers enabling a straight forward top-down design process. A fully digital RF frequency synthesizer for GSM is presented. The modelling, simulation and evaluation process will be illustrated. The paper presents the limits of current development tools and gives requests for future enhanced modelling and simulation tools for the RF design industry. The rms phase error of the investigated architecture has been measured to be below 1.4 degrees and the spectral margin can be maintained to be more than 8 dB.

引用

页码：37 / 42

页数：6

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