Fast implementations of Montgomery's modular multiplication algorithm

被引：0
|
作者：
Mohan, PVA [1 ]
机构：
[1] ITI LTd, Res & Dev, Bangalore 560016, Karnataka, India
来源：
PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL IV: DIGITAL SIGNAL PROCESSING-COMPUTER AIDED NETWORK DESIGN-ADVANCED TECHNOLOGY | 2003年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this paper, techniques for fast implementations of Montgomery's modular multiplication algorithm are described. These use non-redundant multi-bit recoding. These are compared regarding the area and computation requirements and compared with conventional implementation.
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页码：125 / 128
页数：4
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