共 50 条
- [1] How to transform an architectural synthesis tool for Low Power VLSI designs [J]. PROCEEDINGS OF THE 8TH GREAT LAKES SYMPOSIUM ON VLSI, 1998, : 426 - 431
- [2] MODULE GENERATION IN AN ARCHITECTURAL SYNTHESIS ENVIRONMENT [J]. IFIP TRANSACTIONS A-COMPUTER SCIENCE AND TECHNOLOGY, 1993, 22 : 359 - 371
- [3] SYNTHESIS TECHNIQUES FOR LOW-POWER DIGITAL DESIGNS [J]. NEC RESEARCH & DEVELOPMENT, 1995, 36 (01): : 83 - 102
- [4] Low-power architectural synthesis and the impact of exploiting locality [J]. JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 1996, 13 (2-3): : 239 - 258
- [5] PRIORITY FUNCTION BASED POWER EFFICIENT RAPID DESIGN SPACE EXPLORATION OF SCHEDULING AND MODULE SELECTION IN HIGH LEVEL SYNTHESIS [J]. 2011 24TH CANADIAN CONFERENCE ON ELECTRICAL AND COMPUTER ENGINEERING (CCECE), 2011, : 538 - 543
- [8] A SELECTION OF STATE AND LOCAL AWARD WINNERS + ILLUSTRATED ARCHITECTURAL DESIGNS [J]. ARCHITECTURE-THE AIA JOURNAL, 1984, 73 (05): : 114 - &
- [9] Ant Colony Optimization based Module Footprint Selection and Placement for Lowering Power in Large FPGA Designs [J]. 2018 INTERNATIONAL CONFERENCE ON RECONFIGURABLE COMPUTING AND FPGAS (RECONFIG), 2018,
- [10] JavaScript module system: Exploring the design space [J]. MODULARITY 2014 - Proceedings of the 13th International Conference on Modularity (Formerly AOSD), 2014, : 229 - 240