A 12-bit ratio-independent algorithmic A/D converter for a capacitive sensor interface

被引:18
|
作者
Jaervinen, Jere A. M. [1 ,2 ]
Saukoski, Mikko [2 ]
Halonen, Kari A. I. [2 ]
机构
[1] Texas Instruments Inc, High Performance Analog Low Power DC DC Converter, FI-02150 Espoo, Finland
[2] Aalto Univ, Circuit Design Lab, SMARAD 2, Elect Design Lab, FI-02150 Espoo, Finland
关键词
accelerometer; algorithmic analog-digital (A/D) converter; low power; ratio independent; sensor;
D O I
10.1109/TCSI.2008.919749
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper describes a ratio-independent algorithmic analog-digital (A/D) converter architecture that is insensitive to capacitance ratio, amplifier offset voltage, amplifier input parasitics, and flicker noise. It requires only one differential amplifier, a dynamic latch, six capacitors, 36 switches, and some digital logic. The prototype 12-bit, 40-kS/s A/D converter (ADC) with an active die area of 0.041 mm(2) is implemented in a 0.13-mu m CMOS. The power dissipation is minimized using a dynamically biased operational amplifier. With a 68.4-mu W power dissipation, the ADC achieves 80.2-dB spurious-free dynamic range and 63.3-dB signal-to-noise and distortion ratio.
引用
收藏
页码:730 / 740
页数:11
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