Analog Voltage Comparator Based On Digital Differential Circuit

被引:0
|
作者
Jagrut, Shukla [1 ]
Kumar, Ankit [1 ]
Shrivastava, Abhishek [1 ]
Agrawal, Shilpa [1 ]
机构
[1] CiRG, Delhi, India
关键词
Differentiator; Differential circuit; Dynamic Power; Propagation delay; Voltage comparator; Voltage Buffer; DESIGN; AMPLIFIER;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
This paper proposes an innovative, digital-in-concept prospective idea for designing smart analog circuits, operated on low voltage. The mixed signal circuit consists of both digital and analog circuit in which the CMOS digital circuit is easier to fabricate and it increases the speed of the circuit as most of the delay in the circuit comes from the analog circuitry. In present work digitally enhanced analog voltage comparator has been designed using a pure digital differential circuit technique. The proposed digitally enhanced analog voltage comparator circuit has low power dissipation of 0.324 mu W, high resolution of 1.96 mV low DC offset of 1 mV full output swing of 0-1.8V and common mode input range of 0-1.8V. The digital differential circuit has been connected in the unity gain configuration to prove the concept of proposed circuit. The circuit has been simulated using SPICE in TSMC 0.18 mu m CMOS technology at 1.8 V with load capacitance of 1 pf.
引用
收藏
页码:2385 / 2390
页数:6
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