RET application in 45nm node and 32nm node contact hole dry ArF lithography process development

It is challenging to develop 45mn node contact hole using dry ArF lithography process with acceptable lithographic margin due to small process window and large mask error enhancement factor (MEEF). No single process using conventional lithography without resolution enhancement technique (RET) application will meet DOF requirement of 45nm node contact hole. We have developed dry ArF lithography processes for 45nm node contact hole on scanner ASML XT1400E by applying RETs including off-axis illumination, SAFIER (Shrink Assist Film for Enhanced Resolution) process, EFESE (focus scan), etc. The paper will discuss process window through pitches with optimized illumination, and where to separate pitches in case of double exposure with consideration of DOF and OPC model simulation. It will look into the effect of EFESE on DOF improvement, proximity, and MEEF at various pitches. The paper will also discuss OPC modeling strategy for 45nm node contact/via hole. It will analyze the effect of OPC grid size on OPC run time, file size, and edge placement error (EPE). To extend process further to 32nm node, we demonstrated the process capability for 32nm node hole using double patterning technique. We achieved 50nm final hole CD with pitch of 100nm. A hard mask (HM) technique was implemented in the process. The dense feature is designed into two complementary parts on two masks such that the density is reduced by half and minimum pitch is increased by at least a factor of 2(1/2) depending on design. The complete patters are formed with two litho-etch process steps. After the first mask litho process, the HM is etched. Then the second mask litho process is carried out and followed by a second HM etch and main etch.