An Active Impedance-Source Three-Level T-Type Inverter With Reduced Device Count

In this paper, a single-stage active impedance source three-phase T-type inverter is proposed with a reduced component count. Besides the inherent features of the three-level (TL) impedance-source inverters-shoot-through (ST) immunity, single-stage power conversion, and continuous input current-the proposed inverter has additional advantages such as increased voltage gain, reduced passive element count, and low voltage stress on devices. Furthermore, the self-balance capacitor voltage capability is the other feature of the proposed inverter. The steady-state analysis, operating principles, and parameter selection guidelines are presented in detail for the proposed inverter. Pulsewidth modulation (PWM) techniques for the proposed inverter including the sinusoidal PWM method and the modified space-vector modulation scheme for common-mode voltage reduction are also presented. A comprehensive comparison between the proposed inverter and other TL impedance-source inverters is shown. The proposed inverter has been validated using PSIM simulation software, and a laboratory prototype is constructed to verify the performance of the proposed inverter.