SiC via fabrication for wide-band-gap high electron mobility transistor/microwave monolithic integrated circuit devices

A process for achieving high yield of SiC through wafer via holes without trenching or micromasking and with excellent electrical connection after subsequent metal plating across full wafers was developed for use in high electron mobility transistors (HEMTs) and microwave monolithic integrated circuits (MMICs) using an inductively coupled plasma etch. Consideration was given to the choice of wafer platen, hard mask, gas chemistry, surface treatments, and plasma parameters in order to achieve an acceptable etch rate while at the same time minimizing trenching and micromasking that can harm via yield. In addition, the issue of wafer thickness variation and etch nonuniformity leading to punch through of Au pads at the bottom of the vias was addressed by the addition of a metal layer to the front side of the wafer. The etch rate achieved for 25% of a 2 in. diameter wafer is approximately 3800 angstrom/min while demonstrating acceptable levels of trenching and micromasking with little or no Au punch through. The final process has been demonstrated to achieve >95% yield across a full 2 in. diameter, 100 mu m thick wafer with a high density of vias. (C) 2008 American Vacuum Society.