SOS Wafer Cu Pillar Bumping Process Development for Flip Chip Package Application

被引：0
|
作者：
John, Zhiyuan Yang [1 ]
机构：
[1] Peregrine Semicond, San Diego, CA 92121 USA
来源：
2012 13TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY & HIGH DENSITY PACKAGING (ICEPT-HDP 2012) | 2012年
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D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Cu pillar bumping process has been developed on SOS (Silicon on Sapphire) wafer for flip chip package application while in the initial packaging experiment open failure has been found. Voiding in bump pad metal has been found in package failure analysis. The cracks initiated from the voiding have also been captured. Further investigation has confirmed that the surface roughness of bump pad metal is closely related to this failure. The voiding was formed for that the bump pad metal was etched away by plating solvent in bumping process. Solutions on process and bump metal structure design have been discussed and presented with evaluation experiment results in this paper.
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页码：1 / 7
页数：7
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