A 20-40 MHz low-power clock oscillator with open-loop frequency calibration and temperature compensation

被引:0
|
作者
Lee, Dongsoo [1 ]
Kim, Hongjin [1 ]
Lee, Kang-Yoon [1 ]
机构
[1] Sungkyunkwan Univ, Coll Informat & Commun Engn, Suwon 440746, South Korea
基金
新加坡国家研究基金会;
关键词
clock oscillator; period jitter; class-C type VCO; phase noise; temperature compensation; frequency accuracy;
D O I
10.1080/00207217.2013.794490
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, a 20-40MHz low-power clock oscillator is presented to provide the frequency reference in data interface applications. The frequency source is referenced to a frequency-calibrated and temperature-compensated 2.5GHz LC VCO that is implemented with a bondwire inductor. Class-C type VCO is adopted in order to improve the phase noise and reduce the current consumption. A full digital frequency calibration circuit is proposed to cover the wide output frequency range minimizing the frequency variation. External crystal oscillator (REF_CLK) is used only for the absolute frequency calibration at the initial programming stage and is not needed after the programming stage. On the other hand, temperature compensation is performed in an analogue way by controlling the varactor in the LC VCO. This chip is fabricated using 0.18-mu m CMOS with the option of lateral PNP transistor. Lateral PNP transistors are used in the temperature compensation circuits. It can be implemented laterally in standard CMOS process. The power consumption is 4.8mW from a 1.8V supply. The accuracy of the frequency is +/- 58ppm from -20 degrees C to 80 degrees C. The nominal phase noise at 1MHz and period jitter is -122 dBc/Hz and 2ps, respectively, when the output frequency is 25MHz.
引用
收藏
页码:699 / 710
页数:12
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