A Novel Hardware Algorithm for Real-time Image Recognition Based on Real AdaBoost Classification

被引:0
|
作者
Aoki, Takashi [1 ]
Hosoya, Eiichi [1 ]
Otsuka, Takuya [1 ]
Onozawa, Akira [1 ]
机构
[1] NTT Microsyst Integrat Labs, Atsugi, Kanagawa 2430198, Japan
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Real-time object detection is important for surveillance applications. This paper describes a high-performance object detector using a commercially available FPGA. Major bottlenecks in the real AdaBoost classifier are resolved. A new FIR-filter-like hardware architecture takes advantage of an FPGA's hardware parallelism and block-RAM structure. The resulting design uses Xilinx Virtex 5 and achieves the real-time processing performance of 220 f/s at 201 MHz and adjustable recognition performance with a variable number of weak classifiers. This is the first demonstration of a histogram of oriented gradients and Real AdaBoost detector on an FPGA.
引用
收藏
页码:1119 / 1122
页数:4
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