Design, Fabrication and Characterization of Ultra-High Voltage 4H-SiC MOSFET Transistors

A 10-kV silicon carbide MOSFET transistor with multi-zone gradient guard ring (MZG-GR) structure is designed, fabricated, and analyzed. Design and optimization based on two-dimensional device simulator TCAD is used to investigate the effects of MZG-GR technique on breakdown for SiC MOSFET devices. It is found that MZG-GR can achieve a maximum blocking voltage owing to alleviated electric field crowding in the periphery of the active area. Moreover, optimized MZG-GR structure exhibits good tolerances to total dose and surface charges. For the SiC MOSFET transistors with a 100 mu m thick epi-layer doped to 5x10(14) cm(-3), a measured breakdown voltage achieved is 13.6 kV at a source-drain current of 0.01 mA, corresponding to about 95% of the ideal value for a 1-D structure. Furthermore, the variation in reverse blocking voltage with respect to the ring spacing observed in the fabricated transistors shows a good agreement with the simulated results in the trend.